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high speed, esd-protected, full-duplex, i coupler isolated rs-485 transceiver ADM2490E rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006C2008 analog devices, inc. all rights reserved. features isolated, full-duplex rs-485/rs-422 transceiver 8 kv esd protection on rs-485 input/output pins 16 mbps data rate complies with ansi tia/eia-485-a-1998 and iso 8482: 1987(e) suitable for 5 v or 3 v operation (v dd1 ) high common-mode transient immunity: >25 kv/s receiver has open-circuit, fail-safe design 32 nodes on the bus thermal shutdown protection safety and regulatory approvals ul recognition: 5000 v rms isolation voltage for 1 minute per ul 1577 vde certificate of conformity din en 60747-5-2 (vde 0884-10 part 2): 2003-01 din en 60950 (vde 0805): 2001-12; en 60950: 2000 v iorm = 848 v peak operating temperature range: ?40c to +105c wide body, 16-lead soic package applications isolated rs-485/rs-422 interfaces industrial field networks interbus multipoint data transmission systems functional block diagram v dd1 gnd 1 a b v dd2 gnd 2 galvanic isolation y z txd rxd ADM2490E 05889-001 figure 1. general description the ADM2490E is an isolated data transceiver with 8 kv esd protection that is suitable for high speed, full-duplex communi- cation on multipoint transmission lines. it is designed for balanced transmission lines and complies with ansi tia/eia-485-a-1998 and iso 8482: 1987(e). the device employs analog devices, inc., i coupler? technology to combine a 2-channel isolator, a three- state differential line driver, and a differential input receiver into a single package. the differential transmitter outputs and receiver inputs feature electrostatic discharge circuitry that provides protection to 8 kv using the human body model (hbm). the logic side of the device can be powered with either a 5 v or a 3 v supply, whereas the bus side requires an isolated 5 v supply. the device has current-limiting and thermal shutdown features to protect against output short circuits and situations where bus contention could cause excessive power dissipation. the ADM2490E is available in a wide body, 16-lead soic package and operates over the ?40c to +105c temperature range.
ADM2490E rev. a | page 2 of 16 table of contents features .............................................................................................. 1 ? applications ....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications ..................................................................................... 3 ? timing specifications .................................................................. 4 ? package characteristics ............................................................... 4 ? regulatory information ............................................................... 5 ? insulation and safety-related specifications ............................ 5 ? vde 0884-10 insulation characteristics ................................... 5 ? absolute maximum ratings ............................................................ 6 ? esd caution .................................................................................. 6 ? pin configuration and function descriptions ............................. 7 ? test circuits ....................................................................................... 8 ? switching characteristics .................................................................9 ? typical performance characteristics ........................................... 10 ? circuit description......................................................................... 12 ? electrical isolation ...................................................................... 12 ? truth tables................................................................................. 12 ? thermal shutdown .................................................................... 13 ? fail-safe receiver inputs ........................................................... 13 ? magnetic field immunity .......................................................... 13 ? applications information .............................................................. 14 ? isolated power supply circuit .................................................. 14 ? pcb layout ................................................................................. 14 ? typical applications ................................................................... 15 ? outline dimensions ....................................................................... 16 ? ordering guide .......................................................................... 16 ? revision history 8/08rev. 0 to rev. a changes to regulatory approval status throughout .................. 1 changed vde 0884 to vde 0884-10 throughout ...................... 1 changes to table 5 ............................................................................ 5 changes to table 8 ............................................................................ 6 changes to figure 9 .......................................................................... 9 changes to i coupler technology section ................................... 12 changes to magnetic field immunity section ........................... 13 changes to isolated power supply circuit section .................... 14 changes to figure 25 ...................................................................... 14 added typical applications section ............................................ 15 updated outline dimensions ....................................................... 16 changes to ordering guide .......................................................... 16 10/06revision 0: initial version
ADM2490E rev. a | page 3 of 16 specifications all voltages are relative to their respective ground; 2.7 v dd1 5.5 v, 4.5 v v dd2 5.5 v. all minimum/maximum specifications apply over the entire recommended operation range, unless otherwise noted. all typical specifications are at t a = 25c, v dd1 = v dd2 = 5.0 v, unless otherwise noted. table 1. parameter symbol min typ max unit test conditions supply current power supply current, logic side txd/rxd data rate < 2 mbps i dd1 3.0 ma 2.7 v v dd1 5.5 v, unloaded txd/rxd data rate = 16 mbps i dd1 6 ma 100 load between y and z power supply current, bus side txd/rxd data rate < 2 mbps i dd2 4.0 ma 2.7 v v dd1 5.5 v, unloaded txd/rxd data rate = 16 mbps i dd2 60 ma 100 load between y and z driver differential outputs differential output voltage, loaded |v od2 | 2.0 5.0 v r l = 50 (rs-422), see figure 3 1.5 5.0 v r l = 27 (rs-485), see figure 3 |v od4 | 1.5 5.0 v ?7 v v test1 +12 v, see figure 4 ?|v od | for complementary output states ?|v od | 0.2 v r l = 54 or 100 , see figure 3 common-mode output voltage v oc 3.0 v r l = 54 or 100 , see figure 3 ?|v oc | for complementary output states ?|v oc | 0.2 v r l = 54 or 100 , see figure 3 short-circuit output current i os 200 ma logic inputs input threshold low v il 0.25 v dd1 v input threshold high v ih 0.7 v dd1 v txd input current i txd ?10 +0.01 +10 a receiver differential inputs differential input threshold voltage v th ?0.2 +0.2 v input voltage hysteresis v hys 70 mv v oc = 0 v input current (a, b) i i 1.0 ma v oc = 12 v ?0.8 ma v oc = ?7 v line input resistance r in 12 k logic outputs output voltage low v olrxd 0.2 0.4 v i orxd = 1.5 ma, v a ? v b = ?0.2 v output voltage high v ohrxd v dd1 ? 0.3 v dd1 ? 0.2 v i orxd = ?1.5 ma, v a ? v b = 0.2 v short-circuit current 100 ma common-mode transient immunity 1 25 kv/s v cm = 1 kv, transient magnitude = 800 v 1 cm is the maximum common-mode voltage slew rate that can be sustained while maint aining specification-compliant operation. v cm is the common-mode potential difference between the logic and bus sides. the transient magnitude is the range over which the common-mode is slewed. the comm on-mode voltage slew rates apply to both rising and falling common-mode voltage edges.
ADM2490E rev. a | page 4 of 16 timing specifications t a = ?40c to +85c. table 2. parameter symbol min typ max unit test conditions driver maximum data rate 16 mbps propagation delay t plh , t phl 45 60 ns r l = 54 , c l1 = c l2 = 100 pf, see figure 6 and figure 8 pulse width distortion, pwd = |t pylh ? t pyhl |, pwd = |t pzlh ? t pzhl | t pwd , t pwd 7 ns r l = 54 , c l1 = c l2 = 100 pf, see figure 6 and figure 8 single-ended output rise/fall times t r , t f 20 ns r l = 54 , c l1 = c l2 = 100 pf, see figure 6 and figure 8 receiver propagation delay t plh , t phl 60 ns c l = 15 pf, see figure 7 and figure 9 pulse width distortion, pwd = |t plh ? t phl | t pwd 10 ns c l = 15 pf, see figure 7 and figure 9 t a = ?40c to +105c. table 3. parameter symbol min typ max unit test conditions driver maximum data rate 10 mbps propagation delay t pylh , t pyhl , t pzlh , t pzhl 45 60 ns r l = 54 , c l1 = c l2 = 100 pf, see figure 6 and figure 8 pulse width distortion, pwd = |t pylh ? t pyhl |, pwd = |t pzlh ? t pzhl | t pwd , t pwd 9 ns r l = 54 , c l1 = c l2 = 100 pf, see figure 6 and figure 8 single-ended output rise/fall time t r , t f 27 ns r l = 54 , c l1 = c l2 = 100 pf, see figure 6 and figure 8 receiver propagation delay t plh , t phl 60 ns c l = 15 pf, see figure 7 and figure 9 pulse width distortion, pwd = |t plh ? t phl | t pwd 10 ns c l = 15 pf, see figure 7 and figure 9 package characteristics table 4. parameter symbol min typ max unit test conditions resistance (input to output) 1 r i-o 10 12 capacitance (input to output) 1 c i-o 3 pf f = 1 mhz input capacitance 2 c i 4 pf input ic junction-to-case thermal resistance jci 33 c/w thermocouple located at center of package underside output ic junction-to-case thermal resistance jco 28 c/w 1 device considered a 2-terminal device: pin 1, pin 2, pin 3, pin 4, pin 5, pin 6, pin 7, and pin 8 are shorted together and pin 9, pin 10, pin 11, pin 12, pin 13, pin 14, pin 15, and pin 16 are shorted together. 2 input capacitance is from any input data pin to ground.
ADM2490E rev. a | page 5 of 16 regulatory information table 5. ADM2490E approvals organization approval type notes ul recognized under the component recognition program of underwriters laboratories, inc. in accordance with ul 1577, each ADM2490E is proof tested by applying an insulation test voltage 6000 v rms for 1 second (current leakage detection limit = 10 a). vde certified according to din en 60747-5-2 (vde 0884-10 part 2): 2003-01, din en 60950 (vde 0805): 2001-12; en 60950: 2000 in accordance with din en 60747-5-2, each ADM2490E is proof tested by applying an insulation test voltage 1590 v peak for 1 second (partial discharge detection limit = 5 pc). insulation and safety-related specifications table 6. parameter symbol value unit conditions rated dielectric insulation voltage 5000 v rms 1 minute duration minimum external air gap (clearance) l(i01) 7.45 mm min measured from input terminals to output terminals, shortest distance through air minimum external tracking (creepage) l(i02) 8.1 mm min measured from input terminals to output terminals, shortest distance along body minimum internal gap (internal clearance) 0.017 mm min insulation distance through insulation tracking resistance (comparative tracking index) cti >175 v din iec 112/vde 0303 part 1 isolation group iiia material group (din vde 0110, 1/89) vde 0884-10 insulation characteristics this isolator is suitable for basic electrical isolation only within the safety limit data. maintenance of the safety data must be ensured by means of protective circuits. an asterisk (*) on a package denotes vde 0884-10 approval for 848 v peak working voltage. table 7. description symbol characteristic unit installation classification per din vde 0110 for rated mains voltage 300 v rms i to iv 450 v rms i to ii 600 v rms i to ii climatic classification 40/105/21 pollution degree (din vde 0110, see table 1 ) 2 maximum working insulation voltage v iorm 848 v peak input-to-output test voltage, method b1 v pr 1590 v peak v iorm 1.875 = v pr , 100% production tested, t m = 1 sec, partial discharge < 5 pc input-to-output test voltage, method a after environmental tests, subgroup 1 v iorm 1.6 = v pr , t m = 60 sec, partial discharge < 5 pc 1357 v peak after input and/or safety test, subgroup 2/3 v iorm 1.2 = v pr , t m = 60 sec, partial discharge < 5 pc v pr 1018 v peak highest allowable overvoltage (transient overvoltage, t tr = 10 sec) v tr 6000 v peak safety-limiting values (maximum value allowed in the event of a failure; see figure 16 ) case temperature t s 150 c input current i s, input 265 ma output current i s, output 335 ma insulation resistance at t s , v io = 500 v r s >10 9
ADM2490E rev. a | page 6 of 16 absolute maximum ratings t a = 25c, unless otherwise noted. each voltage is relative to its respective ground. table 8. parameter rating storage temperature range ?55c to +150c ambient operating temperature range ?40c to +105c v dd1 ?0.5 v to +7 v v dd2 ?0.5 v to +6 v logic input voltages ?0.5 v to v dd1 + 0.5 v bus terminal voltages ?9 v to +14 v logic output voltages ?0.5 v to v dd1 + 0.5 v average output current, per pin 35 ma esd (human body model) on a, b, y, and z pins 8 kv ja thermal impedance 60c/w stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings apply individually only, not in combination. esd caution
ADM2490E rev. a | page 7 of 16 pin configuration and fu nction descriptions v dd1 1 gnd 1 2 rxd 3 nc 4 v dd2 16 gnd 2 15 a 14 b 13 gnd 1 5 nc 12 txd 6 z 11 nc 7 y 10 gnd 1 8 gnd 2 9 nc = no connect ADM2490E top view (not to scale) 05889-002 figure 2. pin configuration table 9. pin function descriptions pin no. mnemonic description 1 v dd1 power supply (logic side). de coupling capacitor to gnd 1 required; capacitor value should be between 0.01 f and 0.1 f. 2, 5, 8 gnd 1 ground (logic side). 3 rxd receiver output. 4, 7, 12 nc no connect. these pins must be left floating. 6 txd transmit data. 9, 15 gnd 2 ground (bus side). 10 y driver noninverting output. 11 z driver inverting output. 13 b receiver inverting input. 14 a receiver noninverting input. 16 v dd2 power supply (bus side). decoupling capacitor to gnd 2 required; capacitor value should be between 0.01 f and 0.1 f.
ADM2490E rev. a | page 8 of 16 test circuits v oc r l r l v od 05889-003 figure 3. driver voltage measurement 60 ? v od3 375 ? 375 ? v test 05889-004 figure 4. driver voltage measurement v dd1 gnd 1 a b v dd2 v dd2 gnd 2 gnd 2 galvanic isolation y z 220 ? 100 ? 220 ? txd rxd 05889-014 figure 5. supply-current me asurement test circuit (see figure 10 and figure 11 ) c l2 c l1 r ldiff y z 05889-005 figure 6. driver propagation delay c l v out a b 05889-006 figure 7. receiver propagation delay
ADM2490E rev. a | page 9 of 16 switching characteristics t phl t plh 3 v 0v vo z y v oh a , b v ol 1.5v 1.5v t f t r 10% point 10% point 90% point 90% point 1/2vo t pwd = | t plh ? t phl | 0 5889-007 figure 8. driver propagation delay, rise/fall timing a, b rxd 0v 0v 1.5v 1.5v t plh t phl v oh v ol 05889-008 figure 9. receiver propagation delay
ADM2490E rev. a | page 10 of 16 typical performance characteristics 2.70 2.75 2.80 2.85 2.90 2.95 3.00 temperature (c) i dd1 (ma) no load 100 ? load 220 ? -100 ? -220 ? load 05889-015 ?40 ?20 0 20 40 60 80 100 figure 10. i dd1 supply current vs. temperature (see figure 5 ) 0 10 20 30 40 50 60 70 temperature (c) i dd2 (ma) no load 100 ? load 220 ? -100 ? -220 ? load 05889-016 ?40 ?20 0 20 40 60 80 100 figure 11. i dd2 supply current vs. temperature (see figure 5 ) 0 10 20 30 40 50 60 ?40 ?20 0 20 40 60 80 100 temperature (c) del a y (ns) t pzhl t pylh t pzlh t pyhl 05889-017 figure 12. driver propagation delay vs. temperature 0 10 20 30 40 50 60 temperature (c) del a y(ns) t plh t phl ?40 ?20 0 20 40 60 80 100 05889-018 figure 13. receiver propagation delay vs. temperature 05889-019 ch1 2v ch2 2v ch3 2v ch4 2v m20ns a ch2 2.84v 1 2 4 t 44.2% y and z outputs txd rxd figure 14. driver/receiver propagation delay, low to high (r ldiff = 54 , c l1 = c l2 = 100 pf) 05889-020 ch1 2v ch2 2v ch3 2v ch4 2v m20ns a ch2 2.84v 1 2 4 t 44.2% txd rxd y and z outputs figure 15. driver/receiver propagation delay, high to low (r ldiff = 54 , c l1 = c l2 = 100 pf)
ADM2490E rev. a | page 11 of 16 case temperature (c) safety-limiting current (ma) 0 0 350 300 250 200 150 100 50 50 100 150 200 side 1 side 2 05889-021 figure 16. thermal derating curve, dependence of safety-limiting values with case temperature per vde 0884-10 ?14 ?12 ?10 ?8 ?6 ?4 ?2 0 4.0 4.2 4.4 4.6 4.8 5.0 voltage (v) current (ma) 05889-022 figure 17. output current vs. receiver output high voltage 0 2 4 6 8 10 12 14 16 0 0.2 0.4 0.6 0.8 1.0 1.2 voltage (v) current (ma) 05889-023 figure 18. output current vs. receiver output low voltage 4.66 4.67 4.68 4.70 4.72 4.74 4.69 4.71 4.73 4.75 4.76 4.77 ?40 ?20 0 20 40 60 80 100 temperature (c) voltage (v) 05889-024 figure 19. receiver output high voltage vs. temperature, i rxd = ?4 ma 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 ?40 ?20 0 20 40 60 80 100 temperature (c) voltage (v) 05889-025 figure 20. receiver output low voltage vs. temperature, i rxd = C4 ma
ADM2490E rev. a | page 12 of 16 circuit description electrical isolation in the ADM2490E, electrical isolation is implemented on the logic side of the interface. therefore, the part has two main sections: a digital isolation section and a transceiver section (see figure 21 ). the driver input signal, which is applied to the txd pin and referenced to logic ground (gnd 1 ), is coupled across an isolation barrier to appear at the transceiver section referenced to isolated ground (gnd 2 ). similarly, the receiver input, which is referenced to isolated ground in the transceiver section, is coupled across the isolation barrier to appear at the rxd pin referenced to logic ground. i coupler technology the digital signals transmit across the isolation barrier using i coupler technology. this technique uses chip scale transformer windings to couple the digital signals magnetically from one side of the barrier to the other. digital inputs are encoded into waveforms that are capable of exciting the primary transformer winding. at the secondary winding, the induced waveforms are decoded into the binary value that was originally transmitted. positive and negative logic transitions at the input cause narrow pulses (~1 ns) to be sent to the decoder via the transformer. the decoder is bistable and is, therefore, either set or reset by the pulses, indicating input logic transitions. in the absence of logic transitions at the input for more than ~1 s, a periodic set of refresh pulses indicative of the correct input state are sent to ensure dc correctness at the output. if the decoder receives no internal pulses for more than about 5 s, the input side is assumed to be unpowered or nonfunctional, in which case the output is forced to a default state (see tabl e 12 ). truth tables the truth tables in this section use the abbreviations shown in table 10 . table 10. truth table abbreviations abbreviation description h high level i indeterminate l low level x irrelevant table 11. transmitting supply status input outputs v dd1 v dd2 txd y z on on h h l on on l l h table 12. receiving supply status inputs output v dd1 v dd2 a ? b (v) rxd on on >0.2 h on on ADM2490E digital isolation and transceiver sections
ADM2490E rev. a | page 13 of 16 thermal shutdown the ADM2490E contains thermal-shutdown circuitry that protects the part from excessive power dissipation during fault conditions. shorting the driver outputs to a low impedance source can result in high driver currents. the thermal sensing circuitry detects the increase in die temperature under this condition and disables the driver outputs. this circuitry is designed to disable the driver outputs when a die temperature of 150c is reached. as the device cools, the drivers are re-enabled at a temperature of 140c. fail-safe receiver inputs the receiver inputs include a fail-safe feature that guarantees a logic high on the rxd pin when the a and b inputs are floating or open-circuited. magnetic field immunity the limitation on the magnetic field immunity of the i coupler is set by the condition in which an induced voltage in the receiv- ing coil of the transformer is large enough to either falsely set or reset the decoder. the following analysis defines the conditions under which this may occur. the 3 v operating condition of the ADM2490E is examined because it represents the most susceptible mode of operation. the pulses at the transformer output have an amplitude greater than 1 v. the decoder has a sensing threshold of about 0.5 v, thus establishing a 0.5 v margin in which induced voltages can be tolerated. the voltage induced across the receiving coil is given by n nr dt d v n ,,2,1; 2 k = ? ? ? ? ? ? ? = where: is the magnetic flux density (gauss). n is the number of turns in the receiving coil. r n is the radius of the n th turn in the receiving coil (cm). given the geometry of the receiving coil and an imposed requirement that the induced voltage is, at most, 50% of the 0.5 v margin at the decoder, a maximum allowable magnetic field can be determined using figure 22 . magnetic field frequency (hz) 1k 10k 100k 100m 1m 10m 100 10 1 0.1 0.01 0.001 maximum allowable magnetic flux density (kgauss) 0 5889-010 figure 22. maximum allowable external magnetic flux density for example, at a magnetic field frequency of 1 mhz, the maximum allowable magnetic field of 0.2 kgauss induces a voltage of 0.25 v at the receiving coil. this is about 50% of the sensing threshold and does not cause a faulty output transition. similarly, if such an event occurs during a transmitted pulse and is the worst-case polarity, it reduces the received pulse from >1.0 v to 0.75 v, still well above the 0.5 v sensing threshold of the decoder. figure 23 shows the magnetic flux density values in terms of more familiar quantities, such as maximum allowable current flow at given distances away from the ADM2490E transformers. magnetic field frequency (hz) 1k 10k 100k 100m 1m 10m distance = 1m distance = 100mm distance = 5mm 1000 100 0.1 1 10 0.01 maximum allowable current (ka) 05889-011 figure 23. maximum allowable current for various current-to-ADM2490E spacings with combinations of strong magnetic field and high frequency, any loops formed by pcb traces can induce error voltages large enough to trigger the thresholds of succeeding circuitry. care should be taken in the layout of such traces to avoid this possibility.
ADM2490E rev. a | page 14 of 16 applications information isolated power supply circuit the ADM2490E requires isolated power capable of 5 v at up to approximately 65 ma (this current is dependent on the data rate and termination resistors used) to be supplied between the v dd2 and the gnd 2 pins. a transformer driver circuit with a center-tapped transformer and ldo can be used to generate the isolated 5 v supply, as shown in figure 25 . the center-tapped transformer provides electrical isolation of the 5 v power supply. the primary winding of the transformer is excited with a pair of square waveforms that are 180 out of phase with each other. a pair of schottky diodes and a smoothing capacitor are used to create a rectified signal from the secondary winding. the adp3330 linear voltage regulator provides a regulated power supply to the bus-side circuitry (v dd2 ) of the ADM2490E. pcb layout the ADM2490E isolated rs- 485 transceiver requires no external interface circuitry for the logic interfaces. power supply bypass- ing is required at the input and output supply pins (see figure 24 ). bypass capacitors are conveniently connected between pin 1 and pin 2 for v dd1 and between pin 15 and pin 16 for v dd2 . the capacitor value should be between 0.01 f and 0.1 f. the total lead length between both ends of the capacitor and the input power-supply pin should not exceed 20 mm. bypassing between pin 1 and pin 8 and between pin 9 and pin 16 should also be considered unless the ground pair on each package side is connected close to the package. v dd1 gnd 1 rxd nc gnd 1 txd nc gnd 1 v dd2 gnd 2 a b nc z y gnd 2 nc = no connect ADM2490E 0 5889-013 figure 24. recommended printed circuit board layout in applications involving high common-mode transients, care should be taken to ensure that board coupling across the isola- tion barrier is minimized. furthermore, the board layout should be designed such that any coupling that does occur equally affects all pins on a given component side. failure to ensure this could cause voltage differentials between pins exceeding the absolute maximum ratings of the device, thereby leading to latch-up or permanent damage. iso l a tion barrier v cc 78253 sd103c sd103c 22f 10f 5v out in sd gnd err v cc v dd1 v dd2 gnd 1 gnd 2 transformer driver v cc adp3330 ADM2490E 05889-012 figure 25. isolated power-supply circuit
ADM2490E rev. a | page 15 of 16 typical applications the ADM2490E transceiver is designed for point-to-point transmission lines. figure 26 shows a full-duplex point-to-point application. to minimize reflections, terminate the line at the receiver end with a termination resistor. the value of the termination resis tor should be equal to the characteristic impedance of the cable. r d rxo txd ADM2490E a b z y r d rxd txd ADM2490E a b z y notes 1. r t is equal to the characteristic impedance of the cable. r t r t 05889-026 figure 26. full-duplex point-to-point application
ADM2490E rev. a | page 16 of 16 controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013- aa 032707-b 10.50 (0.4134) 10.10 (0.3976) outline dimensions 0.30 (0.0118) 0.10 (0.0039) 2.65 (0.1043) 2.35 (0.0925) 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 0 . 7 5 ( 0 . 0 2 9 5 ) 0 . 2 5 ( 0 . 0 0 9 8 ) 45 1.27 (0.0500) 0.40 (0.0157) c oplanarity 0.10 0.33 (0.0130) 0.20 (0.0079) 0.51 (0.0201) 0.31 (0.0122) seating plane 8 0 16 9 8 1 1.27 (0.0500) bsc figure 27. 16-lead standard small outline package [soic_w] wide body (rw-16) dimensions shown in millimeters and (inches) ordering guide model temperature range packag e description package option ADM2490Ebrwz 1 ?40c to +105c 16-lead standard small outline package [soic_w] rw-16 ADM2490Ebrwz-reel7 1 ?40c to +105c 16-lead standard small outline package [soic_w] rw-16 1 z = rohs compliant part. ?2006C2008 analog devices, inc. all rights reserved. trademarks and registered trademarks are the prop erty of their respective owners. d05889-0-8/08(a)

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